Renesas RX62T 32位MCU开发方案

关键词:工业控制马达控制

时间:2012-8-3 10:01:32      来源:RX62T

Renesas公司的RX62T是100MHz 32位RX CPU内核的MCU,在100MHz时具有165DMIPS性能,单精度32位IEEE-754浮点,累加器能从32x32位运算中处理64位结果,乘法和除法能处理32x32运算,具有快速中断功能,CPU工作电压3.3V或5V,主要用在马达控制,通用逆变器等.本文介绍了RX62T主要特性,方框图,RX62T RSK评估板主要特性,方框图,电路图和PCB元件布局图.

Renesas公司的RX62T是100MHz 32位RX CPU内核的MCU,在100MHz时具有165DMIPS性能,单精度32位IEEE-754浮点,累加器能从32x32位运算中处理64位结果,乘法和除法能处理32x32运算,具有快速中断功能,CPU工作电压3.3V或5V,主要用在马达控制,通用逆变器等.本文介绍了RX62T主要特性,方框图,RX62T RSK评估板主要特性,方框图,电路图和PCB元件布局图.
100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC (3 S/H circuits, double data register, amplifier, comparator): two units, 10-bit ADC one unit, the three ADC units are capable of simultaneous 7-ch. sampling, 100-MHz PWM (two three-phase complementary channels and four single-phase complementary channels or three three-phase.
RX62T主要特性:
■ 32-bit RX CPU core
 Max. operating frequency: 100 MHz
Capable of 165 DMIPS in operation at 100 MHz
 Single precision 32-bit IEEE-754 floating point
 Accumulator handles 64-bit results (for a single instruction) from 32- × 32-bit operations
 Multiplication and division unit handles 32- × 32-bit operations (multiplication instructions take one CPU clock cycle)
 Fast interrupt
 Divider (fastest instruction execution takes two CPU clock cycles)
 Fast interrupt
 CISC Harvard architecture with 5-stage pipeline
 Variable-length instructions: Ultra-compact code
 Background JTAG debugging plus high-speed tracing
■ Operating voltage
 Single 3.3- or 5-V supply; 5-V analog supply is possible with 3.3-V products
■ Low-power design and architecture
 Four low-power modes
■ On-chip main flash memory, no wait states
 100-MHz operation, 10-ns read cycle
 No wait states for reading at full CPU speed
 64-Kbyte/128-Kbyte/256-Kbyte capacities
 For instructions and operands
 User code programmable via the SCI or JTAG
■ On-chip data flash memory
 Max. 32 Kbytes, reprogrammable up to 30,000 times
 Erasing and ...

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