Renesas RX63N 32位RX MCU开发方案

关键词:工业控制马达控制通信技术网络通信以太网

时间:2012-7-16 09:44:25      来源:RX63N

Renesas公司的RX63N是100MHz 32位RX MCU ,165DMIPS性能,集成了多达2MB闪存,以太网MAC,全速USB 2.0主/功能/OTG接口,包括CAN的各种通信接口,10位和12位ADC和RTC.和现有产品相比,待机功耗降低大约90%,工作电压2.7- 3.6V,主要用在音频设备,马达控制,游戏机和通信设备.本文介绍了RX63N主要特性,方框图,RX63N开发套件应用和特性,方框图,电路图和材料清单.

Renesas公司的RX63N是100MHz 32位RX MCU ,165DMIPS性能,集成了多达2MB闪存,以太网MAC,全速USB 2.0主/功能/OTG接口,包括CAN的各种通信接口,10位和12位ADC和RTC.和现有产品相比,待机功耗降低大约90%,工作电压2.7- 3.6V,主要用在音频设备,马达控制,游戏机和通信设备.本文介绍了RX63N主要特性,方框图,RX63N开发套件应用和特性,方框图,电路图和材料清单.
The RX63N/RX631 Group incorporates communication functions suitable for networking equipment, such as Ethernet controller, USB 2.0 full-speed (function, host, or OTG selectable), and CAN. In addition, with a RTC (Real-Time Clock) that can operate on a dedicated power supply as a low power feature, standby power consumption can be reduced by approximately 90% compared to existing products. The selection of on-chip memory has been expanded from ROMless to 2 MB, and even smaller-sized packages are available. This makes possible mounting in anything from large-scale systems to small-scale/small-space devices.
RX63N主要特性:
 32-bit RX CPU core
 Max. operating frequency: 100 MHz
 Capable of 165 DMIPS in operation at 100 MHz
 Single precision 32-bit IEEE-754 floating point
 Two types of multiply-and-accumulation unit (between memories and between registers)
 32-bit multiplier (fastest instruction execution takes one CPU clock cycle)
 Divider (fastest instruction execution takes two CPU clock cycles)
 Fast interrupt
 CISC Harvard architecture with 5-stage pipeline
 Variable-length instructions: Ultra-compact code
 Supports the memory protection unit (MPU)
 JTAG and FINE (two-line) debugging interfaces
 Low-power design and architecture
 Operation from a single 2.7- to 3.6-V supply
 Low power consumption: A product that supports all peripheral functions draws only 500uA/MHz.
 RTC is capable of operation from a dedicated power supply (min. Operating voltage: 2 V).
 Four low-power modes
 On-chip main flash m...

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