ADI ADRF5515A双路3.3-4.0GHz 20W接收器前端方案

ADI公司的ADRF5515A是双路集成了RF,前端多芯片模块,设计用于时分复用(TDD)应用.器件工作频率从3.3GHz到4.0GHz.器件可配置成双路和级联两级低噪音放大器(LNA)和大功率硅单刀双掷(SPDT)开关.在高增益模式,级联的两级LNA和开关提供低噪音1.05dB和3.6GHz时的高增益36dB,而输出三阶交调截取点(OIP3)为35dBm(典型值).在低增益模式,两级LNA的一级处于旁通,在低电流48mA时提供17dB增益.在降功耗模式,LNA关断,器件仅消耗13mA电流.在发送工作,当RF输入连接端引脚(TERM-CHA或TERM-CHB),开关提供低插入损耗0.5dB,在整个生命周期工作中处理长期演进技术(LTE)平均功率43dBm(9dB峰值到平均比(PAR)).器件是RoHS兼容,采用紧凑6mmx6mm 40引脚LFCSP封装.主要用在无线通信基础设备,TDD大规模多输入多输出有源天线系统以及基于TDD的通信系统.本文介绍了ADRF5515A主要特性,功能框图,主要电特性性能表以及20W评估板ADRF5515A-EVALZ主要特性,测试建立图,电路图,材料清单和PCB装配图.

The ADRF5515A is a dual-channel, integrated RF, front-end, multichipmodule designed for time division duplexing (TDD) applications.

The device operates from 3.3 GHz to 4.0 GHz. TheADRF5515A is configured in dual channels with a cascading,two-stage low noise amplifier (LNA) and a high-power silicon singlepole,double-throw (SPDT) switch.

In high gain mode, the cascaded two-stage LNA and switch offer alow noise figure of 1.05 dB and a high gain of 36 dB at 3.6 GHz,with an output third-order intercept (OIP3) point of 35 dBm (typical).

In low gain mode, one stage of the two-stage LNA is in bypass,providing 17 dB of gain at a lower current of 48 mA. In power-downmode, the LNAs are turned off and the device draws 13 mA.

In transmit operation, when RF inputs are connected to a terminationpin (TERM-CHA or TERM-CHB), the switch provides lowinsertion loss of 0.5 dB and handles long-term evolution (LTE)average power (9 dB peak to average ratio (PAR)) of 43 dBm forfull lifetime operation.

The device comes in an RoHS-compliant, compact, 6 mm × 6 mm,40-lead lead frame chip scale package (LFCSP).

ADRF5515A主要特性:

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