ADI ADRF5545A双路2．4－4．2GHz接收前端解决方案

ADI公司的ADRF5545A是双路2.4-4.2GHz接收器前端多片模块,主要用在时分复接(TDD).ADRF5545A可采用级联低噪音放大器(LNA)和大功率硅单刀双掷(SPDT)开关来配置成两路.在高增益模式,级联两级LNA和开关在3.6GHz时提供低噪音1.45dB和高增益32dB,输出三阶交调载取点(OIP3)为32dBm(典型值).而在低增益模式,两级LNA的一级被旁路,以更低电流36mA提供16dB增益.在降功耗模式,LNA关断,器件仅消耗12mA.发送时,RF输入连接到端引脚(TERM-CHA或TERM-CHB),开关的插入损耗为0.65dB,能处理长期演进（LTE）平均功率40dBm.器件和RoHS兼容,主要用在无线基础设备,TDD多个输入和多个输出以及有源天线系统,基于TDD的通信系统.本文介绍了ADRF5545A主要特性,功能框图,评估板ADRF5545A-EVALZ主要特性,测试建立图,电路图,材料清单和PCB装配图.
The ADRF5545A is a dual-channel, integrated radio frequency (RF), front-end multichip module designed for time division duplexing (TDD) applications that operates from 2.4 GHz to 4.2 GHz. The ADRF5545A is configured in dual channels with a cascading two-stage low noise amplifier (LNA) and a high power silicon single-pole, double-throw (SPDT) switch.
In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure (NF) of 1.45 dB and a high gain of 32 dB at 3.6 GHz with an output third-order intercept point (OIP3) of 32 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 16 dB of gain at a lower current of 36 mA. In power-down mode, the LNAs are turned off and the device draws 12 mA.
In transmit operation, when RF inputs are connected to a termination pin (TERM-CHA or TERM-CHB), the switch provides a low insertion loss of 0.65 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 40 dBm for full lifetime operation and 43 dBm for single event (<10 sec) LNA protection operation. The device comes in an RoHS compliant, compact, 6 mm × 6 mm, 40-lead LFCSP package.
ADRF5545A主要特性:
Integrated dual-channel RF front end
2-stage LNA and high power SPDT switch
On-chip bias and matching