NXP LPC5401832位ARM MCU IoT模块解决方案

关键词:ARM Cortex-M4 MCU LPC540xx系列

时间:2018-12-11 10:54:01      来源:中电网

NXP公司的LPC540xx系列是基于ARM Cortex-M4的32位微控制器,采用3级流水线,具有单独本地指令和数据总线哈佛架构以及用于外设的第三总线,支持分支操作的内部预取单元,处理器工作频率180 MHz,单电源1.71V-3.6V工作,主要用在物联网(IoT).本文介绍了LPC540xx系列主要特性和优势,框图,以及IoT模块OM40007主要特性,电路图和材料清单.

NXP公司的LPC540xx系列是基于ARM Cortex-M4的32位微控制器,采用3级流水线,具有单独本地指令和数据总线哈佛架构以及用于外设的第三总线,支持分支操作的内部预取单元,处理器工作频率180 MHz,单电源1.71V-3.6V工作,主要用在物联网(IoT).本文介绍了LPC540xx系列主要特性和优势,框图,以及IoT模块OM40007主要特性,电路图和材料清单.
The LPC540xx is a family of ARM Cortex-M4 based microcontrollers for embedded applications featuring a rich peripheral set with very low power consumption and enhanced debug features.
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated into the core.
The LPC540xx family includes 360 KB of on-chip SRAM, a quad SPI Flash Interface (SPIFI) for expanding program memory, one high-speed and one full-speed USB host and device controller, Ethernet AVB, LCD controller, Smart Card Interfaces, SD/MMC, CAN FD, an External Memory Controller (EMC), a DMIC subsystem with PDM microphone interface and I2S, five general-purpose timers, SCTimer/PWM, RTC/alarm timer, Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), ten flexible serial communication peripherals (USART, SPI, I2S, I2C interface), Secure Hash Algorithm (SHA), 12-bit 5.0 Msamples/sec ADC, and a temperature sensor.
LPC540xx系列主要特性和优势:
 ARM Cortex-M4 core (version r0p1):
 ARM Cortex-M4 processor, running at a frequency of up to 180 MHz.
 Floating Point Unit (FPU) and Memory Protection Unit (MPU).
 ARM Cortex-M4 built-in Nested Vect...

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