ST SPC560P50L5 32位系统级(SoC)芯片汽车应用方案

ST公司的SPC560P50L5是基于32位Power Architecture®的MCU,集成了1088KB闪存和80KB RAM,满足AEC-Q10x规范,工作频率64MHz,提供高性能处理性能而又低功耗,具有可变长度编码(VLE),Nexus® L2+接口,单电源3.3V或5V用于I/O和ADC,工作温度–40到125℃或–40到 105℃,主要用在汽车底盘和安全应用.本文介绍了SPC560P50L5主要特性,框图,以及SPC560P-DISP Discovery开发板主要特性,电路图和材料清单与PCB设计图.
32-bit Power Architecture® based MCU with 1088KB Flash memory and 80KB RAM for automotive chassis and safety applications This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications specifically the airbag application.
This family is one of a series of next-generation integrated automotive microcontrollers based on the Power Architecture technology.
The advanced and cost-efficient host processor core of this automotive controller family complies with the Power Architecture embedded category. It operates up to 64 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.
SPC560P50L5主要特性:
AEC-Q10x qualified 
64 MHz, single issue, 32-bit CPU core complex (e200z0h)
– Compliant with Power Architecture® embedded category
– Variable Length Encoding (VLE) 
Memory organization
– Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller
– Up to 80 KB on-chip SRAM with ECC 
Fail safe protection
– ECC protection on system SRAM and Flash
– Safety port
– SWT with servicing sequence pseudo-random gene...