NXP S32R274汽车雷达MCU开发方案

关键词:e200Z4 CPU无线通信汽车电子工业用雷达 S32R274

时间:2018-1-18 10:52:34      来源:中电网

NXP公司的S32R274是基于32位Power Architecture的用于汽车和工业雷达的MCU,安全核采用e200Z4 32位CPU,计算核采用e200Z7 32位CPU,集成了带ECC的2MB代码闪存(FMC闪存)和带ECC的1.5MB SRAM,雷达接口包括MIPI-CSI2 (4数据链),∑Δ-ADC (4x 12位10 MSps)和DAC (10 MSps)

NXP公司的S32R274是基于32位Power Architecture的用于汽车和工业雷达的MCU,安全核采用e200Z4 32位CPU,计算核采用e200Z7 32位CPU,集成了带ECC的2MB代码闪存(FMC闪存)和带ECC的1.5MB SRAM,雷达接口包括MIPI-CSI2 (4数据链),ΣΔ-ADC (4x 12位10 MSps)和DAC (10 MSps),其它接口包括Zipwire, 2x SAR-ADC, 2x SPI, 2x I2C, 3x FlexCAN (incl. 2x CAN-FD), Flexray™, LINFlexD和以太网,工作温度-40 到150˚ CAEC-Q100 Grade 1.本文介绍了S32R274主要特性,框图和系列产品性能比较表,以及评估板S32R274EVB主板和子板主要特性以及电路图.
The S32R27 is a 32-bit Power Architecture based microcontroller for automotive and industrial radar applications. It offers >4x leap in performance per power vs the previous MPC577X products, and increases the level of integration available to designers of next generation automotive radar modules. Designed to address advanced radar signal processing capabilities and merge it with microcontroller capabilities for generic software tasks and car bus interfacing. It meets the high performance computation demands required by modern beam-forming fast chirp modulation radar systems by offering unique signal processing acceleration together with powerful multi-core architecture.
S32R274主要特性:
• On-chip modules available within the device includethe following features:
• Safety core: Power Architecture? e200Z4 32-bit CPUwith checker core
• Dual issue computation cores: Power Architecture®e200Z7 32-bit CPU
• 2 MB on-chip code flash (FMC flash) with ECC
• 1.5 MB on-chip SRAM with ECC
• RADAR processing
– Signal Processing Toolbox (SPT) for RADAR signalprocessing acceleration
– Cross Timing Engine (CTE) for precise timinggeneration and triggering
– Waveform generation module (WGM) for chirpramp generation
– 4x 12-bit ΣΔ-ADC with 10 MSps
– One DAC with 10 MSps
– MIPICSI2 interface to connect external ADCs
• Memory Protection
– Each core memory protection unit provi...

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