Microchip CEC1302低功耗加密嵌入控制器方案

Microchip公司的CEC1302是集成了高性能32位ARM® Cortex®-M4嵌入MCU和128KB SRAM和32KB引导ROM的低功耗加密嵌入控制器,通信采用I2C总线.器件的两个SPI存储器接口允许EC从外接SPI闪存储器读取代码.本文介绍了CEC1302主要特性,框图,评估板Clicker 2主要特性和电路图.
The CEC1302 incorporates a high-performance 32-bitARM® Cortex®-M4 embedded microcontroller with 128Kilobytes of SRAM and 32 Kilobytes of Boot ROM. Itcommunicates with the system host using the I2C bus.
The CEC1302 has two SPI memory interfaces thatallow the EC to read its code from external SPI flashmemory: private SPI and/or shared SPI. The SharedSPI interface allows for EC code to be stored in ashared SPI chip. The private SPI memory interface providesfor a dedicated SPI flash that is only accessibleby the EC.
The CEC1302 provides support for loading EC codefrom the private or shared SPI flash device on a VCC1power-on. Before executing the EC code loaded from aSPI Flash Device, the CEC1302 validates the EC codeusing a digital signature encoded according to PKCS#1. The signature uses RSA-2048 encryption andSHA-256 hashing. This provides automated detectionof invalid EC code that may be a result of malicious oraccidental corruption. It occurs before each boot of thehost processor, thereby ensuring a HW based root oftrust not easily thwarted via physical replacementattack.
The CEC1302 is directly powered by two separate suspendsupply planes (VBAT and VCC1) and senses theruntime power plane (VCC) to provide “Instant On” andsystem power management functions. It also containsan integrated VCC1 Reset Interface and a systemPower Management Interface that supports low-powerstates and can drive state changes as a result of hardwarewake events.
CEC1302主要特性:
• ARM® Cortex®-M4 Processor Core
- 32-Bit ARM v7-M Instruction Set Architecture
- Hardware Floating Point Unit (FPU)
- Single 4GByte Addressing Space (Von NeumannModel)
- Little-Endian Byte Orderi...